...Simulation

E-mail: whalley@cs.fsu.edu, phone: (904) 644-3506. Supported in part by ONR contract # N00014-94-1-0006.

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...time

When the cache configuration changes, no recompilation is needed; only the static cache simulator, assembler, and linker have to be reinvoked.

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...state.

The reaching state for all paths contains line 1-5, except for reach(7) which is empty.

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...loop

RISC architectures as well as most CISC architectures do not provide a special bit-counting instruction.

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...block

We used a traditional trace-driven method similar to ``Technique B'' in [] but our version was probably finer tuned.

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...method.

For tsp in column 10, the instrumented code ran faster than the uninstrumented program, i.e. the ratio was smaller than 1. These results were reproducible. They may be caused by the different placement of code due to instrumentation, resulting in fewer misses for frequently executed loops.

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